AMD Bulldozer CPU details & roadmap

AMD announced on last Friday that the company has received a design table, completed the first version of the Bulldozer-CPU architecture and it has been sent GlobalFoundriesin a production facility for manufacture 32 nm SOI technology. 

"In the second quarter of this year me Also taped out the first 32nm product based on our new high-performance CPU core Bulldozer. We plan to begin sampling our Bulldozer based server and desktop Processors in the second half this year and of Remain a track for 2011 launches. These new Processors will deliver performance Significant Improvements to the AMD platform. "

Bulldozer module consists of two core or quad-core processor is two-Bulldozer-processor module and four modules. Together, Bulldozer module has two independent integer points in their own L1 cache capability. Single floating point unit to share an integer unit L1 caches. Each unit has four integer conveyor belt, two of which supposedly is dedicated to the memory and two arithmetic operations. L2 cache is shared integer and floating point units between the unit and the L3 cache on the processor for all of the Bulldozer cores-between.

AMD Processors Roadmap:

Apparently, the first 32nm chip of AMD will be code-named Llano and will be the first chip with the Fusion concept that AMD unveiled back in 2006. Llano will feature up to four Shanghai/Phenom II-class cores; 4MB of L3 cache; PC3-12800 (DDR3 1600MHz) memory controller, possibly, with some tweaks to better serve x86 and graphics engines""xbitlabs"